Advancements in digital technologies have permitted the development and implementation of many new products. Products pertaining to, and including, digital processing circuitry are exemplary of products possible as a result of such advancements.
Repetitive functions can be carried out by digital processing circuitry at rates significantly more rapidly than the manual performance of such functions. The rapid rates at which the digital processing circuitry is able to repeatedly perform such functions have permitted activities previously considered impractical, to be readily implementable.
During the effectuation of functions by the operation of digital processing circuitry, data is sometimes read from, and written to, memory locations of a memory device. For instance, a digital computer system includes a central processing unit and a computer main memory. The computer main memory provides storage locations to which to write data, and from which to read data. Asynchronous DRAM (dynamic random access memory) integrated circuit devices are sometimes used to form the computer main memory. DRAM devices provide a relatively inexpensive memory at which to store relatively large amounts of data. SRAM (static random access memory) integrated circuit devices sometimes also form the computer main memory, or portions thereof. Relatively quick access is permitted to the memory locations of an SRAM integrated circuit device as a high-speed, locally-accessed copy of the memory available to the central processing unit of the computer system. However, SRAM devices are relatively more costly than DRAM devices.
An ESDRAM (enhanced synchronous dynamic random access memory) is formed of both a DRAM component portion and an SRAM component portion. Because of the dual nature of an ESDRAM, an ESDRAM provides the advantages of a DRAM memory device and also the advantages of an SRAM device. Namely, the cost advantages of a DRAM are provided by the DRAM component portion of the ESDRAM, and the speed advantages of the SRAM are provided by the SRAM component portion of the ESDRAM. The SRAM component portion of an ESDRAM provides a cache at which a row, also called a "page", can be stored during execution of a read or write operation. Multi-bank ESDRAM memory devices are available having multiple numbers of DRAM banks, each having an associated SRAM cache, at which digital data can be written and read.
In conventional multi-bank ESDRAM devices, a particular SRAM cache is associated with a particular DRAM memory bank. When data is to be read from, or written to, a particular row of a selected DRAM memory bank, the data is conventionally cached in the SRAM cache associated with the DRAM bank in a direct mapping operation. Because of the speed advantages associated with SRAM devices, if a manner could be provided by which to associate more than one SRAM device with a single DRAM memory array, improved memory retrieval times would be possible. If, in a multi-bank, ESDRAM device, for instance a manner could be provided by which to permit access between a single DRAM bank and the SRAM caches associated with other DRAM banks of the multi-bank device, improved rates of data retrieval operations would be possible.
It is in light of this background material related to integrated circuit memory devices that the significant improvements of the present invention have evolved.